AX1251-1A Sink/Source Bus Termination Regulator PDF文档下载 (2015年7月停产)

GENERAL DESCRIPTION
  The AX1251 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 1A while regulating an output voltage to within 20mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage.
  The AX1251 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage,excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection.
  The AX1251 is available in the SOT23-5L surface mount package.

FEATURES
- Ideal for DDR-I, DDR-II and DDR-III VTT Applications
- Sink and Source 1A Continuous Current
- Integrated Power Driver
- Generates Termination Voltage for SSTL_2,SSTL _18,HSTL,SCSI-2 and SCSI-3 Interfaces.
- High Accuracy Output Voltage at Full-Load
- Output Adjustment by Two External Resistors
- Low External Component Count
- Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output
- Current Limiting and Thermal Shutdown Protections
- SOT23-5L Pb-Free Package.